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| author | Leah Rowe <leah@libreboot.org> | 2023-12-23 11:43:36 +0000 |
|---|---|---|
| committer | Leah Rowe <leah@libreboot.org> | 2023-12-23 11:43:36 +0000 |
| commit | 33695a56aefe9e7375cbf3f59e2c51604a8f99a2 (patch) | |
| tree | 406a465910c2bb45ef108c68491f4ad47f3348ff /config/coreboot/haswell/patches/0016-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch | |
| parent | d5f8f6572e29dbe68ca8e787cdab3aa55e25eb01 (diff) | |
build/roms: remove redundant check
cros roms are always using libgfxinit, with a coreboot
framebuffer, so the "normal" initmode is never used.
Signed-off-by: Leah Rowe <leah@libreboot.org>
Diffstat (limited to 'config/coreboot/haswell/patches/0016-haswell-NRI-Add-DDR3-JEDEC-reset-and-init.patch')
0 files changed, 0 insertions, 0 deletions