From 2c29f01a18d0a104bcc4f785e3901de584d02d7e Mon Sep 17 00:00:00 2001 From: Nicholas Chin <nic.c3.14@gmail.com> Date: Mon, 20 May 2024 10:10:03 -0600 Subject: [PATCH] g45/hw-gfx-gma-plls.adb: Make reference clock frequency configurable Instead of assuming a 96 MHz reference clock frequency, use the value specified by the new INTEL_GMA_DPLL_REF_FREQ Kconfig. This defaults to 96 MHz to preserve the existing behavior. An example of where this is needed is the DPLL_REF_SSCLK input, which will typically be 100 MHz to support LVDS spread spectrum clocking. Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> --- common/g45/hw-gfx-gma-plls.adb | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/common/g45/hw-gfx-gma-plls.adb b/common/g45/hw-gfx-gma-plls.adb index 67242f2..1aee576 100644 --- a/common/g45/hw-gfx-gma-plls.adb +++ b/common/g45/hw-gfx-gma-plls.adb @@ -12,6 +12,8 @@ -- GNU General Public License for more details. -- +with CB.Config; + with HW.Time; with HW.GFX.GMA.Config; with HW.GFX.GMA.Registers; @@ -460,7 +462,7 @@ is (Display => Port_Cfg.Display, Target_Dotclock => Target_Clock, -- should be, but doesn't has to be always the same: - Reference_Clock => 96_000_000, + Reference_Clock => CB.Config.INTEL_GMA_DPLL_REF_FREQ, Best_Clock => Clk, Valid => Success); else -- 2.45.1