From 3a5a1793796220938b6d4d56540abc86efdb8878 Mon Sep 17 00:00:00 2001 From: Leah Rowe Date: Sun, 11 Aug 2024 18:16:39 +0100 Subject: flashprog: bump to 639d563 (2024-08-02) The workaround-mx patch was rebased on one section in spi.c, because that part in upstream added QPI support; in the newly rebase mx patch, the workaround_mx behaviour is only honoured if QPI (Quad SPI) is not in use. Quad SPI is not used in practise, on the machines where this workaround is intended (GM45 ThinkPads with Macronix chips). This imports the following upstream changes: * 639d563 README: Update flashprog.org URLs * cbbd601 README: Update dependency list and Linux package names * 79451f1 README: Rename "Packaging" -> "Source Packaging" * 5b4695c README: Dial laptop warning down a little * 7224085 udev rules: Add some more IDs * 448457a ch347_spi: Add CH347F ID and loop over the entries * e39549b ch347_spi: Search for compatible USB interface * dfd0647 ich_descriptors: Refactor component density handling * b2ad9fd ich_descriptors: Make use of SPI_ENGINE_PCH100 marker * 140e22f chipset_enable: Make use of SPI_ENGINE_PCH100 marker * 869f0e7 ichspi: Use `swseq_data' on ICH7 paths too * eeee91b ichspi: Replace all switch/case on `ich_generation' * ecba1d8 ichspi: Drop redundant bail-out cases in ich_set_bbar() * e8babf4 ichspi: Use a single check to enable hwseq for PCH100+ * fda324b ichspi: Introduce SPI_ENGINE_PCH100 marker * a1f6476 ichspi: Split ICH7 init out * 3f75d44 ich_descriptors: Remove `Dual Output Fast Read' for newer gens * 2862011 spi25: Try to set volatile quad-enable (QE) automatically * 4ac536b spi25_statusreg: Allow to write (non-)volatile bits specifically * b1d2bae dediprog: Fix and enable 4BA modes for SF600Plus-G2 * d0afeef dediprog: Disable 4BA modes for SF100 w/ protocol v2 * 1b1deda Implement QPI support * a1b7f35 dediprog: Implement multi-i/o reads * 008a44f dediprog: Split read/write command preparation by protocol * 4760b6e spi25: Implement multi-i/o reads * 0c9af0a spi25: Check quad-enable (QE) bit * 930d421 spi25: Introduce generic spi_prepare_io()/spi_finish_io() * 8d0f465 spi25: Extract 4BA preparations into new `spi25_prepare.c` * 044c9dc Add FT4222H support * fc7c13c linux_gpio2_spi: Implement multi i/o * 5fc3154 bitbang_spi: Implement multi-i/o * d16a911 bitbang_spi: Move API into its own header file * 226bb87 flashchips: Add missing QE-bit definitions * 4fa39c5 flashchips: Fill multi-i/o gaps in MX25U family * 5f50999 flashchips: Fill multi-i/o gaps in MX25R family * 46552c8 flashchips: Fill multi-i/o gaps in MX25L family * 96786d0 flashchips: Fill quad-i/o gaps in XM25Q family * a26a3c6 flashchips: Fill dual-i/o gaps in W25X family * 2133f59 flashchips: Fill quad-i/o gaps in W25Q family * 68573af flashchips: Split GD25Q127C and GD25Q128C * 4da971f flashchips: Fill quad-i/o gaps in GD25*Q families * f7e2d97 spi: Allow to define a quad-enable (QE) configuration bit * 1412d9f spi: Rework FEATURE_QPI * d518563 spi: Prepare for multi i/o and dummy bytes * bd72a47 spi25_statusreg: support reading/writing configuration register * 3d728e7 spi25_statusreg.c: support reading security register * a358b14 flashchips: Split W25Q64.W -> W25Q64DW | W25Q64FW/W25Q64JW...Q * 3127db1 manibuilder: Drop legacy flashrom tag collections * 619d9c0 manibuilder: Use `test_build.sh' * 6560bba manibuilder/almalinux: Install `diffutils' for new `test_build.sh' * c7b549e test_build.sh: Compare output for -L of Make and Meson builds * 72b30a0 test_build.sh: Don't try to run cross-compiled programs * 3d2f212 test_build.sh: Allow to override Make and Meson commands * 4eb9748 test_build.sh: Run tests for both Make and Meson builds * 8279457 manibuilder: Add Alpine Linux 3.18 & 3.19 images * 15e9b10 manibuilder/alpine: Install libjaylink-dev when available * b8b3593 manibuilder: Add images for Fedora 38..40 * 7b05f09 manibuilder: Add images for Ubuntu 24.04 "Noble Numbat" * 5e8b339 manibuilder/anita: Add NetBSD 10.0 i386 & amd64 images * 61da8c7 manibuilder/anita: Export library path for libusb * 39152af manibuilder: Set sourcearcade.org as default source * 20073e7 Properly clear erase-block selection when bigger block is chosen * 3824c8d ichspi: Allow all opcodes when the "opmenu" isn't locked * 0d4354e flashchips: Add W25Q32JV-.M Signed-off-by: Leah Rowe --- .../patches/0001-Workaround-for-MX25-chips.patch | 26 +++++++++++++--------- 1 file changed, 15 insertions(+), 11 deletions(-) (limited to 'config/flashprog') diff --git a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch index ddbe90a6..fc3befb1 100644 --- a/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch +++ b/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch @@ -1,4 +1,4 @@ -From 25047d86c478beb58fd7c9a3539b03ea9426edb6 Mon Sep 17 00:00:00 2001 +From 9d8c79eecf760e4f963a0a7f29b577cd84962a2a Mon Sep 17 00:00:00 2001 From: consts Date: Fri, 2 Mar 2018 07:03:37 +0000 Subject: [PATCH 1/1] Workaround for MX25 chips @@ -11,10 +11,10 @@ Chip: MX25L6405D Tested-by: Riku Viitanen Change-Id: I43a306b67862b59c1dcd02729e189f3bf73f481b --- - cli_classic.c | 5 +++++ - include/programmer.h | 1 + - spi.c | 9 +++++++++ - 3 files changed, 15 insertions(+) + cli_classic.c | 5 +++++ + include/programmer.h | 1 + + spi.c | 11 ++++++++++- + 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/cli_classic.c b/cli_classic.c index ab5f8b1..2825033 100644 @@ -47,10 +47,10 @@ index ab5f8b1..2825033 100644 show_progress = true; break; diff --git a/include/programmer.h b/include/programmer.h -index edef52b..722e599 100644 +index 873dc37..2007fd6 100644 --- a/include/programmer.h +++ b/include/programmer.h -@@ -356,6 +356,7 @@ enum ich_chipset { +@@ -364,6 +364,7 @@ enum ich_chipset { CHIPSET_GEMINI_LAKE, CHIPSET_ELKHART_LAKE, }; @@ -59,11 +59,11 @@ index edef52b..722e599 100644 /* ichspi.c */ #if CONFIG_INTERNAL == 1 diff --git a/spi.c b/spi.c -index ac51d87..be62588 100644 +index 748ef99..9bbdee9 100644 --- a/spi.c +++ b/spi.c -@@ -26,10 +26,19 @@ - #include "programmer.h" +@@ -27,13 +27,22 @@ + #include "spi_command.h" #include "spi.h" +int workaround_mx; /* Make operations with MX25* chips more reliable */ @@ -72,12 +72,16 @@ index ac51d87..be62588 100644 unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { -+ if (workaround_mx) { +- if (spi_current_io_mode(flash) != SINGLE_IO_1_1_1) ++ if (spi_current_io_mode(flash) != SINGLE_IO_1_1_1) { + return default_spi_send_command(flash, writecnt, readcnt, writearr, readarr); ++ } else if (workaround_mx) { + const unsigned char cmd[JEDEC_READ_OUTSIZE] = {JEDEC_READ, 0, 0, 0}; + unsigned char buf[256]; + /* keep flash busy for some time, keep CS warm before sending actual command */ + flash->mst.spi->command(flash, sizeof(cmd), sizeof(buf), cmd, buf); + } + + /* actual command */ return flash->mst.spi->command(flash, writecnt, readcnt, writearr, readarr); -- cgit v1.2.1