From 3f9d575cebc377de8eae7fe0406e7e8549318964 Mon Sep 17 00:00:00 2001 From: Leah Rowe Date: Mon, 12 Aug 2024 02:19:38 +0100 Subject: coreboot/x4x: fix build error see relevant patch added in the diff set the clock on x4x boards to 96MHz like on GM45 fixes the following build error on x4x boards: hw-gfx-gma-plls.adb:465:46: error: "INTEL_GMA_DPLL_REF_FREQ" not declared in "Config" make: *** [Makefile:423: build/ramstage/libgfxinit/common/g45/hw-gfx-gma-plls.o] Error 1 Signed-off-by: Leah Rowe --- config/coreboot/g43t_am3/config/libgfxinit_txtmode | 1 + 1 file changed, 1 insertion(+) (limited to 'config/coreboot/g43t_am3') diff --git a/config/coreboot/g43t_am3/config/libgfxinit_txtmode b/config/coreboot/g43t_am3/config/libgfxinit_txtmode index 42abd3a3..cca1ebda 100644 --- a/config/coreboot/g43t_am3/config/libgfxinit_txtmode +++ b/config/coreboot/g43t_am3/config/libgfxinit_txtmode @@ -137,6 +137,7 @@ CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout" CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 # CONFIG_CONSOLE_POST is not set +CONFIG_INTEL_GMA_DPLL_REF_FREQ=96000000 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xe0000000 CONFIG_ECAM_MMCONF_BUS_NUMBER=256 CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld" -- cgit v1.2.1