From 29e9c32e32f8e947f51a3efe375dab3ef8e1987e Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Tue, 31 Oct 2023 08:11:53 +0000
Subject: coreboot/default: use alternative heap size fix
My previous fix to revert didn't fix S3 on GM45, one
of the platforms reported fixed by 78263; I'm merging
that instead, at patch set 10.
It is referenced by 78815/1 which was split from it,
so merge that too (restores overrides of higher values,
on certain platforms that we don't use yet).
https://review.coreboot.org/c/coreboot/+/78623/10
https://review.coreboot.org/c/coreboot/+/78815/1
Accordingly, update configs to match the new default.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
...fig-Bring-HEAP_SIZE-to-a-common-large-val.patch | 341 ---------------------
...rease-default-HEAP_SIZE-from-1-MiB-to-512.patch | 41 +++
...tore-HEAP_SIZE-overrides-greater-than-512.patch | 80 +++++
3 files changed, 121 insertions(+), 341 deletions(-)
delete mode 100644 config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
create mode 100644 config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch
create mode 100644 config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch
(limited to 'config/coreboot/default/patches')
diff --git a/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch b/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
deleted file mode 100644
index cca8901f..00000000
--- a/config/coreboot/default/patches/0025-Revert-Kconfig-Bring-HEAP_SIZE-to-a-common-large-val.patch
+++ /dev/null
@@ -1,341 +0,0 @@
-From f1b5b0051718139cf59ad047d42d1360b8452ec5 Mon Sep 17 00:00:00 2001
-From: Leah Rowe <leah@libreboot.org>
-Date: Sun, 29 Oct 2023 01:18:50 +0000
-Subject: [PATCH 1/1] Revert "Kconfig: Bring HEAP_SIZE to a common, large
- value"
-
-This reverts commit 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6.
-
-NOTE:
-
-this is done instead of merging:
-https://review.coreboot.org/c/coreboot/+/78623
-
-which is still under review for now
-
-the patch i'm reverting is this one:
-https://review.coreboot.org/c/coreboot/+/78270
-
-this was actually only merged the day before i
-updated coreboot revs in lbmk to the 12 october rev,
-so there's no harm in quickly reverting this for now
-
-however, later on, we will rely on the other patch
----
- src/Kconfig | 3 ++-
- src/cpu/qemu-x86/Kconfig | 3 +++
- src/mainboard/sifive/hifive-unleashed/Kconfig | 3 +++
- src/northbridge/amd/pi/Kconfig | 4 ++++
- src/soc/amd/picasso/Kconfig | 4 ++++
- src/soc/amd/stoneyridge/Kconfig | 4 ++++
- src/soc/cavium/cn81xx/Kconfig | 3 +++
- src/soc/intel/alderlake/Kconfig | 5 +++++
- src/soc/intel/apollolake/Kconfig | 4 ++++
- src/soc/intel/cannonlake/Kconfig | 4 ++++
- src/soc/intel/elkhartlake/Kconfig | 4 ++++
- src/soc/intel/jasperlake/Kconfig | 4 ++++
- src/soc/intel/meteorlake/Kconfig | 5 +++++
- src/soc/intel/skylake/Kconfig | 4 ++++
- src/soc/intel/tigerlake/Kconfig | 4 ++++
- src/soc/intel/xeon_sp/Kconfig | 4 ++++
- src/soc/intel/xeon_sp/cpx/Kconfig | 4 ++++
- src/soc/intel/xeon_sp/skx/Kconfig | 4 ++++
- src/soc/intel/xeon_sp/spr/Kconfig | 4 ++++
- src/soc/qualcomm/ipq40xx/Kconfig | 4 ++++
- 20 files changed, 77 insertions(+), 1 deletion(-)
-
-diff --git a/src/Kconfig b/src/Kconfig
-index ae8024089e..1549719dd0 100644
---- a/src/Kconfig
-+++ b/src/Kconfig
-@@ -751,7 +751,8 @@ config RTC
-
- config HEAP_SIZE
- hex
-- default 0x100000
-+ default 0x100000 if FLATTENED_DEVICE_TREE
-+ default 0x4000
-
- config STACK_SIZE
- hex
-diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
-index 0fa999e1ac..f3e2c4cea9 100644
---- a/src/cpu/qemu-x86/Kconfig
-+++ b/src/cpu/qemu-x86/Kconfig
-@@ -35,4 +35,7 @@ config MAX_CPUS
- default 32 if SMM_TSEG
- default 4
-
-+config HEAP_SIZE
-+ default 0x8000
-+
- endif
-diff --git a/src/mainboard/sifive/hifive-unleashed/Kconfig b/src/mainboard/sifive/hifive-unleashed/Kconfig
-index 7bc3b0bcbb..7f9300f2a7 100644
---- a/src/mainboard/sifive/hifive-unleashed/Kconfig
-+++ b/src/mainboard/sifive/hifive-unleashed/Kconfig
-@@ -10,6 +10,9 @@ config BOARD_SPECIFIC_OPTIONS
- select FLATTENED_DEVICE_TREE
- select SPI_SDCARD
-
-+config HEAP_SIZE
-+ default 0x10000
-+
- config MAINBOARD_DIR
- default "sifive/hifive-unleashed"
-
-diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
-index 4ffe82a15f..4518db149b 100644
---- a/src/northbridge/amd/pi/Kconfig
-+++ b/src/northbridge/amd/pi/Kconfig
-@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
- hex
- default 0x200000
-
-+config HEAP_SIZE
-+ hex
-+ default 0xc0000
-+
- endif # NORTHBRIDGE_AMD_PI
-diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
-index c33f287067..796fe4eb13 100644
---- a/src/soc/amd/picasso/Kconfig
-+++ b/src/soc/amd/picasso/Kconfig
-@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
- bool
- default n
-
-+config HEAP_SIZE
-+ hex
-+ default 0xc0000
-+
- config SERIRQ_CONTINUOUS_MODE
- bool
- default n
-diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
-index 6ff135e6a8..9af7455bae 100644
---- a/src/soc/amd/stoneyridge/Kconfig
-+++ b/src/soc/amd/stoneyridge/Kconfig
-@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
- bool
- default n
-
-+config HEAP_SIZE
-+ hex
-+ default 0xc0000
-+
- config EHCI_BAR
- hex
- default 0xfef00000
-diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig
-index 77ca97202b..368581f8f1 100644
---- a/src/soc/cavium/cn81xx/Kconfig
-+++ b/src/soc/cavium/cn81xx/Kconfig
-@@ -30,6 +30,9 @@ config ARCH_ARMV8_EXTENSION
- int
- default 1
-
-+config HEAP_SIZE
-+ default 0x10000
-+
- config STACK_SIZE
- default 0x2000
-
-diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
-index 4b960c1d22..82ec8f263e 100644
---- a/src/soc/intel/alderlake/Kconfig
-+++ b/src/soc/intel/alderlake/Kconfig
-@@ -215,6 +215,11 @@ config IED_REGION_SIZE
- hex
- default 0x400000
-
-+config HEAP_SIZE
-+ hex
-+ default 0x80000 if BMP_LOGO
-+ default 0x10000
-+
- config GFX_GMA_DEFAULT_MMIO
- default 0xaf000000 if MAINBOARD_HAS_EARLY_LIBGFXINIT
-
-diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
-index 78ec2987ce..bce935d800 100644
---- a/src/soc/intel/apollolake/Kconfig
-+++ b/src/soc/intel/apollolake/Kconfig
-@@ -252,6 +252,10 @@ config IFWI_FILE_NAME
- help
- Name of file to store in the IFWI region.
-
-+config HEAP_SIZE
-+ hex
-+ default 0x8000
-+
- config MAX_ROOT_PORTS
- int
- default 6
-diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
-index a42a3c365b..80237f9810 100644
---- a/src/soc/intel/cannonlake/Kconfig
-+++ b/src/soc/intel/cannonlake/Kconfig
-@@ -160,6 +160,10 @@ config IED_REGION_SIZE
- hex
- default 0x400000
-
-+config HEAP_SIZE
-+ hex
-+ default 0x8000
-+
- config NHLT_DMIC_1CH_16B
- bool
- depends on ACPI_NHLT
-diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
-index 3361c0ddb9..7f1c767379 100644
---- a/src/soc/intel/elkhartlake/Kconfig
-+++ b/src/soc/intel/elkhartlake/Kconfig
-@@ -104,6 +104,10 @@ config IED_REGION_SIZE
- hex
- default 0x0
-
-+config HEAP_SIZE
-+ hex
-+ default 0x8000
-+
- config MAX_ROOT_PORTS
- int
- default 7
-diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
-index 3d84991e09..ff5def3263 100644
---- a/src/soc/intel/jasperlake/Kconfig
-+++ b/src/soc/intel/jasperlake/Kconfig
-@@ -106,6 +106,10 @@ config IED_REGION_SIZE
- hex
- default 0x400000
-
-+config HEAP_SIZE
-+ hex
-+ default 0x8000
-+
- config MAX_ROOT_PORTS
- int
- default 8
-diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
-index 590e8b80e1..48030a1911 100644
---- a/src/soc/intel/meteorlake/Kconfig
-+++ b/src/soc/intel/meteorlake/Kconfig
-@@ -197,6 +197,11 @@ config IED_REGION_SIZE
- hex
- default 0x400000
-
-+config HEAP_SIZE
-+ hex
-+ default 0x80000 if BMP_LOGO
-+ default 0x10000
-+
- # Intel recommends reserving the PCIe TBT root port resources as below:
- # - 42 buses
- # - 194 MiB Non-prefetchable memory
-diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
-index e0df501460..d6a11363ee 100644
---- a/src/soc/intel/skylake/Kconfig
-+++ b/src/soc/intel/skylake/Kconfig
-@@ -151,6 +151,10 @@ config EXCLUDE_NATIVE_SD_INTERFACE
- help
- If you set this option to n, will not use native SD controller.
-
-+config HEAP_SIZE
-+ hex
-+ default 0x80000
-+
- config IED_REGION_SIZE
- hex
- default 0x400000
-diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
-index c07a0d8365..0a4b7bfdb8 100644
---- a/src/soc/intel/tigerlake/Kconfig
-+++ b/src/soc/intel/tigerlake/Kconfig
-@@ -152,6 +152,10 @@ config IED_REGION_SIZE
- config INTEL_TME
- default n
-
-+config HEAP_SIZE
-+ hex
-+ default 0x10000
-+
- config MAX_ROOT_PORTS
- int
- default 24 if SOC_INTEL_TIGERLAKE_PCH_H
-diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
-index e63bee5451..63ced01067 100644
---- a/src/soc/intel/xeon_sp/Kconfig
-+++ b/src/soc/intel/xeon_sp/Kconfig
-@@ -91,6 +91,10 @@ config ECAM_MMCONF_BASE_ADDRESS
- config ECAM_MMCONF_BUS_NUMBER
- default 256
-
-+config HEAP_SIZE
-+ hex
-+ default 0x80000
-+
- config HPET_MIN_TICKS
- hex
- default 0x80
-diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
-index ac166c3038..f54f7716b6 100644
---- a/src/soc/intel/xeon_sp/cpx/Kconfig
-+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
-@@ -71,6 +71,10 @@ config CPU_MICROCODE_CBFS_LEN
- hex
- default 0x7C00
-
-+config HEAP_SIZE
-+ hex
-+ default 0x80000
-+
- config STACK_SIZE
- hex
- default 0x4000
-diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig
-index 5d843878e1..c2c3d4e2e8 100644
---- a/src/soc/intel/xeon_sp/skx/Kconfig
-+++ b/src/soc/intel/xeon_sp/skx/Kconfig
-@@ -55,6 +55,10 @@ config CPU_MICROCODE_CBFS_LEN
- hex
- default 0x7C00
-
-+config HEAP_SIZE
-+ hex
-+ default 0x80000
-+
- config IED_REGION_SIZE
- hex
- default 0x400000
-diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
-index 43b87ade14..b1c4c783b7 100644
---- a/src/soc/intel/xeon_sp/spr/Kconfig
-+++ b/src/soc/intel/xeon_sp/spr/Kconfig
-@@ -79,6 +79,10 @@ config CPU_MICROCODE_CBFS_LEN
- hex
- default 0x8c00
-
-+config HEAP_SIZE
-+ hex
-+ default 0x80000
-+
- config STACK_SIZE
- hex
- default 0x4000
-diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
-index 0ce92731c0..0eabb00752 100644
---- a/src/soc/qualcomm/ipq40xx/Kconfig
-+++ b/src/soc/qualcomm/ipq40xx/Kconfig
-@@ -57,4 +57,8 @@ config SBL_UTIL_PATH
- help
- Path for utils to combine SBL_ELF and bootblock
-
-+config HEAP_SIZE
-+ hex
-+ default 0x8000
-+
- endif
---
-2.39.2
-
diff --git a/config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch b/config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch
new file mode 100644
index 00000000..31e86e86
--- /dev/null
+++ b/config/coreboot/default/patches/0028-Kconfig-Decrease-default-HEAP_SIZE-from-1-MiB-to-512.patch
@@ -0,0 +1,41 @@
+From 7eda35a9b63d070ede24b32253855ce07c6c7d13 Mon Sep 17 00:00:00 2001
+From: Bill XIE <persmule@hardenedlinux.org>
+Date: Tue, 24 Oct 2023 13:56:16 +0800
+Subject: [PATCH 1/2] Kconfig: Decrease default HEAP_SIZE from 1 MiB to 512 KiB
+
+Commit 44a48ce7a46c ("Kconfig: Bring HEAP_SIZE to a common, large
+value") breaks S3 resume from TSEG stage cache on many platforms,
+including GM45 and Ivy Bridge, so limit it to 512 KiB.
+
+Please test this against other platforms before merging!
+
+Tested: Setting it to 0x80000 results a working S3 resume on Thinkpad
+ X200 and T430, with log in cbmem for S3 resume, while 0xa0000
+ breaks it. coreboot log during failed resume when (HEAP_SIZE
+ >= 0xa0000) cannot be obtained from EHCI debug, while log in
+ cbmem shows that ramstage is failed to be found in TSEG stage
+ cache, as shown in https://ticket.coreboot.org/issues/512 .
+
+Resolves: https://ticket.coreboot.org/issues/512
+Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
+Change-Id: Ib1de1eb8487df5bdf004e544d40667833a291515
+---
+ src/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/Kconfig b/src/Kconfig
+index ae8024089e..6db0736715 100644
+--- a/src/Kconfig
++++ b/src/Kconfig
+@@ -751,7 +751,7 @@ config RTC
+
+ config HEAP_SIZE
+ hex
+- default 0x100000
++ default 0x80000
+
+ config STACK_SIZE
+ hex
+--
+2.39.2
+
diff --git a/config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch b/config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch
new file mode 100644
index 00000000..2bfd8783
--- /dev/null
+++ b/config/coreboot/default/patches/0029-Kconfig-Restore-HEAP_SIZE-overrides-greater-than-512.patch
@@ -0,0 +1,80 @@
+From 012a72b4acfe19f4456f203f2378f98d00646122 Mon Sep 17 00:00:00 2001
+From: Bill XIE <persmule@hardenedlinux.org>
+Date: Tue, 31 Oct 2023 00:12:02 +0800
+Subject: [PATCH 2/2] Kconfig: Restore HEAP_SIZE overrides greater than 512 KiB
+
+Commit 44a48ce7a46c ("Kconfig: Bring HEAP_SIZE to a common, large
+value") breaks S3 resume from TSEG stage cache on many platforms,
+including GM45 and Ivy Bridge.
+
+Now the default value becomes 512 KiB, but a few platforms have
+greater value before commit 44a48ce7a46c. This commit is to restore
+them.
+
+Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
+Change-Id: I78cd56b0683dd2ef94319a98a720f2da58151626
+---
+ src/Kconfig | 1 +
+ src/northbridge/amd/pi/Kconfig | 4 ++++
+ src/soc/amd/picasso/Kconfig | 4 ++++
+ src/soc/amd/stoneyridge/Kconfig | 4 ++++
+ 4 files changed, 13 insertions(+)
+
+diff --git a/src/Kconfig b/src/Kconfig
+index 6db0736715..24bd1469e0 100644
+--- a/src/Kconfig
++++ b/src/Kconfig
+@@ -751,6 +751,7 @@ config RTC
+
+ config HEAP_SIZE
+ hex
++ default 0x100000 if FLATTENED_DEVICE_TREE
+ default 0x80000
+
+ config STACK_SIZE
+diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
+index 4ffe82a15f..4518db149b 100644
+--- a/src/northbridge/amd/pi/Kconfig
++++ b/src/northbridge/amd/pi/Kconfig
+@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
+ hex
+ default 0x200000
+
++config HEAP_SIZE
++ hex
++ default 0xc0000
++
+ endif # NORTHBRIDGE_AMD_PI
+diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
+index c33f287067..796fe4eb13 100644
+--- a/src/soc/amd/picasso/Kconfig
++++ b/src/soc/amd/picasso/Kconfig
+@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
+ bool
+ default n
+
++config HEAP_SIZE
++ hex
++ default 0xc0000
++
+ config SERIRQ_CONTINUOUS_MODE
+ bool
+ default n
+diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
+index 6ff135e6a8..9af7455bae 100644
+--- a/src/soc/amd/stoneyridge/Kconfig
++++ b/src/soc/amd/stoneyridge/Kconfig
+@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
+ bool
+ default n
+
++config HEAP_SIZE
++ hex
++ default 0xc0000
++
+ config EHCI_BAR
+ hex
+ default 0xfef00000
+--
+2.39.2
+
--
cgit v1.2.1